In modern data communication systems, when electrical signals are sent across a lossy channel as a stream of bits, signal dispersion causes adjacent bits to interfere with each other in a process called inter-symbol interference. This interference degrades the received signal and reduces the ability of a receiver to recover the bits that were transmitted. Signal dispersion can be compensated through a process known as channel equalization. In this process, a filter whose characteristics partially or completely cancel the effects of the channel is applied within the receiver, in series with the lossy channel. This filter is known as an “equalizer,” and, when implemented in the analog domain, as an “analog equalizer.” Further, because it is implemented at the receiver, it is known as a “receive-side equalizer.”
Because a given channel characteristic depends on the channel's dielectric type, media, temperature, and length, a highly desirable feature of an analog equalizer is to be able to tune its characteristics. Additionally, once an equalizer characteristic is chosen, it is important for the equalizer to maintain this characteristic independent of semiconductor process variations. Existing implementations of high-speed analog equalizers rely primarily on capacitive-source degeneration of a differential pair. Tuning of such equalizers is usually achieved by using a varactor as the capacitor and adjusting the voltage across the varactor. Alternatively, fixed capacitors may be used in the differential-pair circuit, with a network of switches to switch the fixed capacitors. Yet another variation involves the use of a fixed capacitor with a variable source-degeneration resistor.
A problem that arises in equalizers based on capacitive-source degeneration, however, is that the electrical characteristics of this type of equalizer may vary significantly, based on the process-dependent variations of the passive components (e.g., the source-degeneration resistor and the varactor or capacitor). Because these variations can be ±10% for the capacitor and ±20% for the resistor in modern semiconductor processes, undesirable large variations of the filter characteristics with process may result.
Another problem is that existing equalizers either (i) altogether lack any capability for gain variation or (ii) include a variable-gain amplifier (VGA) that interferes with the equalization. Variable-gain amplification is helpful to insure that the output of the equalizer remains linear over a range of input amplitudes. Conventional combined VGA/equalizer stages, however, suffer from dependent control of gain and the zero position of the equalizer. Stated differently, when the VGA function adjusts the gain, it also adjusts the zero position associated with the equalizer, and vice versa. As such, the gain control and the equalizer control are linked. Tuning of the zero position associated with the equalizer is therefore difficult, and its accurate placement over process variations is nearly impossible. For this reason, implementations that require independent control of both the gain and the zero position of the equalizer usually use a cascade of two separate stages (a VGA followed by an equalizer, or vice versa), which results in significantly higher power dissipation and overall circuit complexity.